Plog logic sometimes wrong when using the toggle and data values

[adamj]

Hello fellow Plog users. I ran into something very confusing and I wonder if your Plog module does this too.

If I send a clock to Plog's toggle input, then it does what I expect: every clock pulse flip flops the value of the toggle output between 0V and 5V. The toggle output is normalled to the data flip flop's clock input, which also flip flops like a toggle if there's no data input.

This means I get a latched pattern like this with the toggle and data outputs: (OFF, OFF), (ON, ON), (OFF, ON), (ON, OFF). I want to AND the toggle and data outputs together to get: OFF, ON, OFF, OFF. I'm trying to sequence separate A and B patterns as ABAA (or AAAB) via a momentary switch.

In summary: Connect a clock to the TOGGLE input. Connect OUT T to an X input and OUT D to the corresponding Y output. Set that X/Y to AND mode. Don't plug anything else in.

Here's my problem: When I AND together the toggle and data outputs, I get the pattern OFF, ON, ON, OFF (ABBA). When the toggle is OFF and data is ON, the AND value is ON, which is wrong. I hooked everything up to the scope and I keep coming to the conclusion the AND output is just wrong in this scenario.

I tried to recreate this behavior with various other AND inputs like manually controlled DC or two gate sequencer tracks, and that all works fine. Strangely, it also works if I don't clock the toggle input and instead manually press the toggle button. In general all the logic works correctly, so I don't think anything is wrong with my module

I eventually discovered if I run the toggle output through a fast CV delay or slew limiter, then it works like I expect. It also works if I run it through an Intellijel OR module, which I'm guessing delays the signal slightly too. A short AHR envelope also works, which makes sense since it's basically a slew. Running through a mult does not help, so I guess that does not delay the signal (enough).

Can anyone else reproduce this behavior? Do you know of any other workarounds? Maybe I could use the Mystic Circuits Envelope as a 0HP slew limiter solution to avoid wasting another module.

[Phitar]

Sounds like it's wanting the clock pulse to be more gatelike. Agree? Have you tried a square wave as clock input yet?
Sorry, I haven't tried to replicate your findings yet.

[adamj]

Sounds like it's wanting the clock pulse to be more gatelike. Agree?

Based on the slew limiter workaround, I agree that's a reasonable theory, but I don't think it's relevant here.

The toggle and data signals that I am using for the boolean logic both flip-flop their on/off state, so they stay at a high voltage for a while, which I would call gate-like. It's not a momentary pulse. (That said, I am sending a pulse-based clock signal to the toggle's clock input, but I don't think that should matter because it's not the input to the boolean logic. I am pretty sure I tried both pulse-based and gate-like clock signals but I will double check.)

The strange thing is I can more or less simulate the exact same situation with an Intellijel Steppy step sequencer where the gate length is set to a maximum (the duration of the step) using two 4-step tracks with the combination of steps off/off, on/on, on/off, off/on. This works fine. Clearly something is different about the Plog's toggle signal, I just couldn't see anything obvious on the scope.

I wondered if there could be some weird issue with self-patching this module, but that's why I tried running the signals out to a buffered multiple and back in, and that didn't change the behavior.

The only theory I have is it's somehow related to the duration of the edge of the high-to-low voltage transition, like the toggle output changes signal values too fast and the slew limiter creates a little bit of a slope to the edge. Maybe the boolean logic relies on the transition to detect the change in voltage state, rather than it depending on the actual voltage at any given moment? And somehow it's not detecting this particular transition. Otherwise... I have no idea what's going on.

Anyway, I am mostly wondering if just my module has this idiosyncrasy or if it's intrinsic to how Plog works.

[Phitar]

Not just you. Mine is the same. For some reason the D Out on the right holds the AND function on the left side high while it is high patched the way you mentioned. However, if you patch the clock into the X input and Toggle flip flop input (mult) then run the D Out to Y input the AND function seems to operate as expected.

Not sure why that is.... I understand that the Data flip flog is the latching D Gate type but that shouldn't impact the standard logic side if self patched.

[adamj]

Not just you. Mine is the same.

Cool, that's what I wanted to know. Thanks for checking!

However, if you patch the clock into the X input and Toggle flip flop input (mult) then run the D Out to Y input the AND function seems to operate as expected.

Yeah, that sort of avoids the issue if you use a square wave clock. But during the clock "tick" where the toggle state goes from on to off (and data is on), the clock will cause the AND value to be on when I want it to be off. It's a slightly different pattern than what I'm looking for.

Another workaround is to use a clock divider and send the /2 clock to the data CLK input, instead of letting the toggle be the clock for the data section.

Tangentially:
I've been studying Plog a lot and this isn't the first strange behavior I encountered: If you run a bipolar signal into the DATA input, it can cause the toggle to flip states, which isn't what you'd expect. I confirmed with Intellijel support that this is just the way the module works (probably something to do with the negative voltage protection). It's designed to take 0-5V, so the solution is to not send it negative voltages.

That's easy enough to remember and avoid, but the behavior we're discussing in this thread is more frustrating because the toggle/data side of Plog is just asking to be self-patched into the logic side and I wish it worked more seamlessly.

My takeaway: There's a reason this module has been discontinued. Intellijel's products have improved massively the last few years in terms of hardware quality, feature set, and usability. For example, compare a uStep to a Steppy. It's night and day. It looks like Plog is 10 years old, and I wouldn't be surprised if they had to make compromises with the hardware available at the time, which somehow led to these strange behaviors. I bet a Plog 2 could be designed with a modern approach to avoid these unexpected behaviors, so I hope they consider making it one day. In the meantime, there's nothing quite like Plog, so I'm sticking with it and learning how to work with its quirks.

[Phitar]

I wasn't even aware it had been discontinued until today when I started looking for the manual online to research that FF section to make sure it is supposed to do what I thought. I was aware that there a couple of situations where the truth table wasn't being honest (or the logic was being illogical) when I first got the thing but it has never caused me any grief. I can always use the Klavis Logica XT as the Source of Truth.